1. Field of the Invention
The present invention relates to synchronization of plesiochronous digital signals received in bipolar code in a digital multiplexer working on the basis of positive justification. More particularly, the invention deals with a circuit for synchronizing one of the plesiochronous signals with a local clock signal for the purpose of transcoding and justifying the plesiochronous signal.
2. Description of the Prior Art
To be more precise, this invention concerns generation of a timing signal in input means included in such a synchronizing circuit. The input means is sometimes called a "junction", as taught in the article by Andre AVENEAU and Xavier BARBIER, IEEE INTERNATIONAL ZURICH SEMINAR ON DIGITAL COMMUNICATIONS, Z/u/ rich, 9th-11th March 1976, pages A2.1 to A2.4, New-York, and arranged before justifying, or stuffing, and storing means in a time-division multiplexer, as disclosed in U.S. Pat. No. 4,002,844.
To recover a timing signal corresponding to the bit rate of a plesiochronous signal, the input means in known synchronizing circuits comprises analog components such as filters that are poorly suited to integration.